|  |  |  | @ -80,9 +80,17 @@ VkResult draw_frame( | 
		
	
		
			
				|  |  |  |  |           context->frame[context->current_frame].transfer_infos[transfer_index].offset, | 
		
	
		
			
				|  |  |  |  |           context->frame[context->current_frame].transfer_infos[transfer_index].size); | 
		
	
		
			
				|  |  |  |  |       src_offset += context->frame[context->current_frame].transfer_infos[transfer_index].size; | 
		
	
		
			
				|  |  |  |  |       VkBufferMemoryBarrier barrier = { | 
		
	
		
			
				|  |  |  |  |         .sType = VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER, | 
		
	
		
			
				|  |  |  |  |         .buffer = context->frame[context->current_frame].transfer_infos[transfer_index].buffer, | 
		
	
		
			
				|  |  |  |  |         .offset = context->frame[context->current_frame].transfer_infos[transfer_index].offset, | 
		
	
		
			
				|  |  |  |  |         .size = context->frame[context->current_frame].transfer_infos[transfer_index].size, | 
		
	
		
			
				|  |  |  |  |         .srcAccessMask = VK_ACCESS_TRANSFER_WRITE_BIT, | 
		
	
		
			
				|  |  |  |  |         .dstAccessMask = VK_ACCESS_INDIRECT_COMMAND_READ_BIT | VK_ACCESS_TRANSFER_READ_BIT | VK_ACCESS_TRANSFER_WRITE_BIT | VK_ACCESS_SHADER_READ_BIT, | 
		
	
		
			
				|  |  |  |  |       }; | 
		
	
		
			
				|  |  |  |  |       vkCmdPipelineBarrier(transfer_commands, VK_PIPELINE_STAGE_TRANSFER_BIT, VK_PIPELINE_STAGE_TRANSFER_BIT | VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT | VK_PIPELINE_STAGE_DRAW_INDIRECT_BIT, 0, 0, NULL, 1, &barrier, 0, NULL); | 
		
	
		
			
				|  |  |  |  |     } | 
		
	
		
			
				|  |  |  |  | 
 | 
		
	
		
			
				|  |  |  |  | 
 | 
		
	
		
			
				|  |  |  |  |     record_ui_compute(transfer_commands, ui, context->current_frame); | 
		
	
		
			
				|  |  |  |  |     VK_RESULT(vkEndCommandBuffer(transfer_commands)); | 
		
	
		
			
				|  |  |  |  |     VkPipelineStageFlags wait_stages[] = {VK_PIPELINE_STAGE_TRANSFER_BIT, VK_PIPELINE_STAGE_TRANSFER_BIT}; | 
		
	
	
		
			
				
					|  |  |  | 
 |